AI chip shortage moves upstream: CoWoS packaging bottleneck deepens into 2028

The AI semiconductor supply crisis has shifted from wafer fabrication to advanced packaging, with CoWoS (Chip-on-Wafer-on-Substrate) assembly now the binding constraint through 2028. TSMC's CoWoS capacity is sold out through 2026 with lead times running 52–78 weeks; the company is scaling production from ~35,000 wafers per month in late 2024 to 130,000 by year-end 2026, but demand is estimated at ~1 million wafers for 2026—a roughly 20% shortfall. NVIDIA, Broadcom, and AMD control ~85% of global CoWoS capacity allocation, leaving smaller players and AI startups competing for scraps.

A second, structural bottleneck underlies the packaging crunch: ABF (Ajinomoto Fine-Techno) substrate film, which is consumed in production with no inventory buffer. Ajinomoto controls ~95% of supply; industry projections show a 10% supply-demand gap in H2 2026, widening to 21% in 2027 and potentially 40% by 2028. Lead times for finished ABF substrates run 16–24 weeks and are expected to remain there through 2027. Samsung Electro-Mechanics announced a $1.2B investment to expand capacity, but volume production won't ship until Q3 2027—too late to ease 2026–2027 constraints.

Advanced packaging prices are rising at 2–4x the rate of underlying wafers—an unusual inversion signaling scarcity. Taken together, CoWoS capacity limits and substrate material shortages mean an AI chip designer submitting an order today cannot reasonably expect delivery before mid-2028 in many cases. The shortage is structural, not cyclical: unlike the 2021–2022 pandemic oversupply (resolved via inventory drawdown), these constrained materials are consumed in production.

For practitioners: advanced packaging has become a strategic, not commodity, resource. Track TSMC CoWoS utilization, ABF substrate lead times, and hyperscaler capacity reservations as primary indicators of AI infrastructure supply risk. Companies without secured packaging allocation face de facto delays of 1–2 years on next-generation AI chip designs.