Qualcomm unveils High Bandwidth Compute; AI250 targets $15B data center revenue by 2029

Qualcomm unveiled its High Bandwidth Compute (HBC) memory architecture and announced AI data center chip roadmap at its June 24, 2026 Investor Day, aiming for $15 billion in annual data center AI chip sales by fiscal 2029, up from $5 billion in 2027. The HBC design stacks low-power DRAM directly on logic dies using through-silicon vias, eliminating costly high-bandwidth memory (HBM) packaging and advanced interposers. Qualcomm claims HBC delivers 6x higher bandwidth-per-watt versus HBM and offers 768GB capacity with 133TB/s bandwidth, targeting deployment with the AI250 accelerator in mid-2027, followed by AI300 in 2028.

The architecture addresses the semiconductor industry's energy and cost constraints: as AI infrastructure demand strains power grids and costs spiral, customers increasingly optimize for cost-per-inference rather than peak performance. Qualcomm secured design wins with Microsoft (multigeneration agreement across PC, local AI, and data center) and Meta (multigeneration commitment for the Dragonfly C1000 CPU with 250+ cores at 5GHz). The company also acquired AI software firm Modular, creating a software layer to bridge CUDA-written applications to Qualcomm hardware—a strategic move against NVIDIA's moat.

For architects planning large-scale AI deployments, this is significant because it offers a credible alternative to NVIDIA dominance: HBC's power efficiency and lower TCO address hyperscaler pressure from extended power availability constraints (gas turbines are booked through 2028). However, the caveat is execution risk: all products are still in sampling/development stages, and NVIDIA maintains 70-80% GPU market share with proven CUDA ecosystem lock-in. Qualcomm's strategy pivots on efficiency and software compatibility rather than raw performance—a viable path for inference at scale, but fragmented from training.