STMicroelectronics launches ST54M with post-quantum crypto hardware accelerator for mobile

STMicroelectronics announced the ST54M, a single-die mobile security chip combining NFC controller, secure element, embedded SIM (eSIM), and a dedicated hardware accelerator for post-quantum cryptography (PQC). The chip integrates support for lattice-based PQC algorithms ML-KEM and ML-DSA, enabling smartphone and personal electronics makers to deploy quantum-resistant encryption while maintaining backward compatibility with hybrid cryptographic approaches. Commercial sampling is available immediately, with full volume production and Common Criteria 2022 EUCC and EMVCo certifications targeted for July 2026.

The ST54M addresses an emerging architectural requirement: as federal mandates (CNSA 2.0, Executive Order 14412) drive a 2030 deadline for post-quantum encryption transitions across federal systems and 2031 for authentication, OEMs must integrate PQC at the hardware level rather than relying on software implementations. The chip's single-die integration preserves smartphone form factors and power budgets—critical for mobile devices. The hardware accelerator is designed with physical counter-measures against side-channel and fault-injection attacks, leveraging ST's certified firmware libraries NesLib-PQML and X-CUBE-PQC.

For architects and infrastructure teams, the ST54M signals that quantum-safe mobile payments, digital identity, and vehicle access control infrastructure can now be designed without waiting for post-2027 hardware. The dual-layer approach (hardware acceleration + certified software) reduces risk in critical deployments. Competing offerings from Samsung (S3SSE2A) and Infineon (PSoC Control C3) show the PQC-at-silicon trend is industry-wide, but ST's integrated NFC/eSIM solution addresses the broadest set of 2026 use cases. Architects should begin design reviews for 2026 certification targets.