TSMC 2nm volume production on track; 70% yields, all 2026 capacity sold out, Apple >50% of initial alloc

TSMC has commenced volume production of 2nm chips (N2 process) in Q4 2025 as planned, using gate-all-around nanosheet transistors and achieving yields of approximately 70%—a strong indicator of maturity at this early stage of a cutting-edge node. The company is ramping capacity across Fab 20 (Baoshan, Hsinchu) and Fab 22 (Kaohsiung), both in Taiwan. All 2nm production capacity at these two fabs for 2026 is already fully booked, underscoring intense demand from chip designers moving to the advanced node for AI and high-performance computing.

Apple has secured over 50% of the initial 2nm capacity for its A20 and M6 chips; other customers include NVIDIA (for Rubin GPU), AMD (Zen 6 CPUs), Qualcomm, MediaTek, and Google. TSMC targets 80% yield on the enhanced N2P variant scheduled for H2 2026, with A16 (1.6nm, featuring Super Power Rail backside power delivery) volume production also planned for H2 2026. The N2 process delivers 10–15% performance gain at the same power, 25–30% power reduction at same performance, and 15% higher transistor density compared to N3E for mixed designs (up to 20% for logic-only).

For architects: TSMC’s 70% N2 yields and sold-out 2026 capacity confirm the node is viable and that the chip industry has moved decisively to GAA transistor architectures. The full booking of advanced capacity signals confidence in AI and HPC cycles—hyperscalers will ship N2 silicon throughout 2026–‧2027. The speed of ramp (volume production within one year of risk production) demonstrates TSMC’s operational maturity, while the pricing power (TSMC raising prices 5–10% on advanced nodes starting 2026) reflects scarcity and margins.