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Running the wire
Funding Baidu's Kunlunxin targets $50B Hong Kong IPO, ties chip purchases to allocations Funding Momenta launches Hong Kong IPO targeting $751M for autonomous driving R&D Chips HBM now comprises 35-47% of AI accelerator BOM; GB200 HBM alone costs $4,800/unit Market Samsung HBM4 revenue tops $1 billion; targets $10 billion run-rate by end-2026 Chips OpenAI, Broadcom unveil Jalapeño LLM inference chip; gigawatt-scale deployment targeted by end-2026 Market TSMC warns AI chip shortage to persist into 2027; signals 15% 3nm price increase H2 2026 Research DeepSeek V4 DSpark speculative decoding cuts inference latency 85%, hits Together AI Breaking OpenAI launches $150M Partner Network to certify 300K consultants by year-end Breaking HP becomes flagship Frontier adopter; OpenAI scales enterprise AI agent platform with consulting partnerships Breaking Apple lobbies White House for CXMT DRAM approval as memory costs hit 20% MacBook, iPad price hikes Funding Samsung, SK Hynix plan $1.3T capex over decade on AI memory demand Breaking Lenovo, NVIDIA Partner on AI Cloud Gigafactory; Reduce Inference Server Deployment Timelines from Months to Weeks Chips Google TPUs Power Anthropic Expansion; Up to 1M Ironwood Chips Lock $40B Multi-Gigawatt Capacity Deal Through 2027+ Chips NVIDIA confirms Vera Rubin full production; Rubin GPU leads AgentPerf with 20x efficiency over Hopper Policy FERC orders grid operators to fast-track AI data center connections; 60-day deadline to justify or rewrite tariffs Chips Coherent CHIPS grant $50M for indium phosphide fab expansion; quadruples Sherman wafer output for AI optical networking Chips NVIDIA partners with SK Hynix on next-gen AI memory; codeveloping for Vera Rubin and autonomous fabs Chips TSMC CoWoS hits 98% yield; SoW-X roadmap supports 64 HBM stacks; co-packaged optics production 2026 Chips PNY DDR5-5600 32GB hits $379.99 — cheapest 2x16GB kit amid RAM crisis; 16% discount Chips TSMC 2nm mass production hits 70% yield; Apple, NVIDIA locked in through 2026 Funding Baidu's Kunlunxin targets $50B Hong Kong IPO, ties chip purchases to allocations Funding Momenta launches Hong Kong IPO targeting $751M for autonomous driving R&D Chips HBM now comprises 35-47% of AI accelerator BOM; GB200 HBM alone costs $4,800/unit Market Samsung HBM4 revenue tops $1 billion; targets $10 billion run-rate by end-2026 Chips OpenAI, Broadcom unveil Jalapeño LLM inference chip; gigawatt-scale deployment targeted by end-2026 Market TSMC warns AI chip shortage to persist into 2027; signals 15% 3nm price increase H2 2026 Research DeepSeek V4 DSpark speculative decoding cuts inference latency 85%, hits Together AI Breaking OpenAI launches $150M Partner Network to certify 300K consultants by year-end Breaking HP becomes flagship Frontier adopter; OpenAI scales enterprise AI agent platform with consulting partnerships Breaking Apple lobbies White House for CXMT DRAM approval as memory costs hit 20% MacBook, iPad price hikes Funding Samsung, SK Hynix plan $1.3T capex over decade on AI memory demand Breaking Lenovo, NVIDIA Partner on AI Cloud Gigafactory; Reduce Inference Server Deployment Timelines from Months to Weeks Chips Google TPUs Power Anthropic Expansion; Up to 1M Ironwood Chips Lock $40B Multi-Gigawatt Capacity Deal Through 2027+ Chips NVIDIA confirms Vera Rubin full production; Rubin GPU leads AgentPerf with 20x efficiency over Hopper Policy FERC orders grid operators to fast-track AI data center connections; 60-day deadline to justify or rewrite tariffs Chips Coherent CHIPS grant $50M for indium phosphide fab expansion; quadruples Sherman wafer output for AI optical networking Chips NVIDIA partners with SK Hynix on next-gen AI memory; codeveloping for Vera Rubin and autonomous fabs Chips TSMC CoWoS hits 98% yield; SoW-X roadmap supports 64 HBM stacks; co-packaged optics production 2026 Chips PNY DDR5-5600 32GB hits $379.99 — cheapest 2x16GB kit amid RAM crisis; 16% discount Chips TSMC 2nm mass production hits 70% yield; Apple, NVIDIA locked in through 2026
Chips

TSMC CoWoS hits 98% yield; SoW-X roadmap supports 64 HBM stacks; co-packaged optics production 2026

TSMC is scaling advanced packaging technologies to meet explosive AI compute demand. At its 2026 Technology Symposium, the foundry reported achieving >98% yield on its largest 5.5-reticle CoWoS packaging platform, which integrates multiple dies and memory. The company is advancing its System-on-Wafer (SoW) roadmap with SoW-X projected to accommodate 64 HBM stacks—enabling multi-terabyte memory configurations in dense GPU packages. This represents a critical enabler for next-generation AI accelerators like NVIDIA's Blackwell and beyond.

Co-packaged optics (CPO) via TSMC's Compact Universal Photonics Engine (COUPE) is reaching production in 2026 for substrate integration. The technology delivers 2X power efficiency and 10X latency reduction versus pluggable optical modules on circuit boards, using 200Gbps micro-ring modulators. The density and power gains are essential as AI data centers scale interconnect bandwidth requirements between racks. Advanced 3D chip stacking (SoIC) on TSMC's most advanced nodes will reach production in 2029.

For infrastructure architects, TSMC's packaging leadership translates to faster HBM scaling and lower power consumption in next-gen GPU packages. The 98% CoWoS yield and rapid CPO ramp mean suppliers can sustain multi-chip AI accelerators without packaging becoming the bottleneck. This offsets memory fab constraints by allowing maximum utility per manufactured HBM stack. Expect packaging-level innovation to accelerate through 2027–2029 as foundries compete to pack more compute and memory density at constant or lower power.

Sources