AI accelerators are consuming power at rates that silicon power conversion can no longer sustain. According to EPC executives speaking at EE Power Asia 2026, individual GPUs will dissipate as much as 5 kW within two years while operating at core voltages below 1 V and drawing currents approaching 10,000 A. Gallium nitride (GaN) semiconductors are now being deployed across multiple power conversion stages inside data center servers to handle this density, replacing silicon MOSFETs that have hit their practical efficiency ceiling.
The power architecture inside AI servers is undergoing fundamental redesign. Data centers are shifting from conventional AC distribution directly into server racks toward centralized sidecar systems that deliver an 800-V DC bus to each rack, with power conversion then occurring on the server board itself. This eliminates bulky power supply drawers and reduces distribution losses, but it pushes the final conversion stages to supply thousands of amperes at extremely low voltages. According to EPC's Alex Lidow, server board space is "the most expensive real estate in the world," making power density as critical as efficiency. Higher switching frequencies reduce the size of magnetic components and allow more conversion circuitry to fit in the limited space surrounding GPUs.
Silicon has reached its performance ceiling for this workload. EPC's Jason Zhang stated that silicon improvements have slowed to around 20% per generation, "just not enough" to keep pace with accelerating power requirements. Silicon on-resistance is approaching its theoretical limit, and incremental gains have become increasingly difficult. GaN devices, by contrast, continue to improve rapidly. EPC's seventh-generation platform delivers lower on-resistance and lower gate charge across both higher-voltage devices and a new family of low-voltage products ranging from 18 V to 40 V. Lower gate charge enables higher switching frequencies: Zhang noted that EPC's Gen 7 devices switch efficiently at about 3 MHz in synchronous buck converters, roughly 3× the switching frequency of comparable silicon implementations. The company's roadmap targets switching frequencies approaching 10 MHz, enabling current densities of roughly 5 A/mm² for future AI processors requiring 10,000 A of current.
GaN adoption is spreading across the entire server power tree. Lidow expects GaN to be deployed across virtually every power conversion stage inside future AI servers. Today it is already widely used in the 48-V input stage. As AI architectures migrate toward 800-V distribution and lower intermediate voltages, GaN is being designed into 800-V input converters, intermediate bus converters, and point-of-load regulators. Lower-voltage conversion stages require substantially more semiconductor area because current increases as voltage decreases, so GaN adoption is expected to accelerate as power conversion moves closer to the GPU core.
Manufacturing capacity is no longer a constraint. Unlike silicon carbide, GaN devices are produced on silicon substrates using largely conventional silicon manufacturing equipment supplemented by epitaxial growth processes. EPC relies on multiple ecosystem partners for wafer fabrication, testing, packaging, and logistics. Zhang stated that "GaN has no capacity constraint." Reliability has also matured significantly over nearly two decades of development. Rather than relying solely on traditional silicon qualification methods, EPC evaluates GaN devices within their intended applications, identifies intrinsic failure mechanisms, and modifies device design and manufacturing processes to eliminate them. Lidow noted that EPC's GaN devices have accumulated eight years of deployment on AI data center cards with "phenomenal reliability."
The operational case for GaN extends beyond power delivery efficiency. Zhang noted that hyperscale operators increasingly evaluate total facility efficiency rather than only processor performance. Even modest improvements in conversion efficiency can significantly reduce electricity consumption, cooling requirements and water usage across gigawatt-scale AI facilities. According to Zhang, GaN can improve overall efficiency by 5% from AC to the GPU core, which represents substantial operating cost savings at scale. Environmental considerations are also becoming important as AI infrastructure expands, particularly in regions where electricity consumption, water usage and community impact are receiving greater regulatory scrutiny.
Future AI power architectures will continue evolving toward higher distribution voltages and lower intermediate bus voltages. While 800-V distribution is becoming the industry baseline, future GPU generations may require 1,200-V, 1,500-V or even 2,000-V primary buses supported by multilevel converter topologies. Intermediate buses are expected to move from 12 V toward 6 V before direct GaN conversion to sub-1 V GPU core supplies. Within EPC, future development is shifting away from discrete transistors toward increasingly integrated GaN power ICs. Lidow stated that "I think we have squeezed all that we can out of GaN discretes" and that integration will become necessary as switching speeds continue to increase, enabling distributed gate drivers, monolithic power stages, and higher levels of functionality that cannot be achieved with discrete components alone.
For architects designing GPU clusters, the takeaway is clear: silicon power conversion is no longer viable at the scale and density AI workloads demand, and GaN adoption across multiple conversion stages is now a requirement rather than an optimization.