NVIDIA has launched Vera, its first custom-built data center CPU, which claims 1.8x faster sustained per-core performance for agentic sandbox workloads compared to x86. Independent Phoronix benchmarks indicate it outperforms AMD's flagship EPYC 9575F by 10% on a geomean of all tests.

Vera CPU geomean performance vs competing architectures (x86 = baseline). Data from Phoronix benchmarks.
FIG. 02 Vera CPU geomean performance vs competing architectures (x86 = baseline). Data from Phoronix benchmarks. — Phoronix, NVIDIA

The 88-core monolithic die is driven by NVIDIA's Olympus core, a 10-wide out-of-order design with SVE2 FP8 support, 2 MB of private L2 per core, and a 162–164 MB unified L3 cache. It features LPDDR5X SOCAMM memory modules that provide 1.2 TB/s of bandwidth at under 40 W, and the NVIDIA developer blog specifies 14 GB/s of uniform memory bandwidth per core—three times the rate of typical DDR5-based data center CPUs. A second-generation Scalable Coherency Fabric offers 3.4 TB/s of core-to-core bisection bandwidth, enabling Vera to maintain over 90% of peak memory bandwidth under full load. As the host CPU for NVIDIA's Vera Rubin platforms, Vera also connects to GPUs via second-generation NVLink-C2C at speeds of up to 1.8 TB/s.

Vera targets the orchestration layer that GPUs typically overlook. NVIDIA pairs the CPU with a 250 W–450 W configurable TDP and emphasizes deterministic latency from its monolithic layout, avoiding chiplet-bound NUMA hops or performance cliffs when threads spill across domains. For agentic stacks, this means sandboxed code execution, tool calls, and data retrieval remain on-CPU without dispatch latency to a GPU. Perplexity's tests found Vera to be 1.5x faster than x86 for cloning a repository and running tests, and 1.9x faster at spinning up concurrent sandboxes. SVE2 FP8 support also allows lightweight scoring or quantized inference steps to run in-core rather than crossing the PCIe fabric, aligning with industry forecasts that Arm estimates agentic data centers will require roughly four times the CPU core count per gigawatt than training-centric facilities, shifting host CPU ratios from the old 1:8 toward 1:1.

Customer benchmarks: Vera speedups across sandbox orchestration, SQL analytics, and data streaming vs x86.
FIG. 03 Customer benchmarks: Vera speedups across sandbox orchestration, SQL analytics, and data streaming vs x86. — NVIDIA, Phoronix

Phoronix founder Michael Larabel described Vera as the most competitive non-x86 server CPU he had tested, noting a 63% geomean uplift over NVIDIA's previous Grace chip and a 55% jump over Intel's 128-core Xeon 6980P. NVIDIA claims 40% lower peak loaded latency versus x86, and the NVIDIA Vera CPU Efficiency for AI Factories developer blog states that "With a capacity of more than 22.5K sandboxes, Vera CPU Rack delivers over 4x the capacity and 2x the performance per watt of x86-based server racks." Vera is already in full production at CoreWeave, Lambda, Oracle Cloud Infrastructure, and others, with broad OEM availability from Dell, HPE, Lenovo, and Supermicro expected in the second half of 2026.

The migration to Vera comes with challenges. Optimized binaries require GCC 16.1 or LLVM Clang 21 or newer—NVIDIA upstreamed Olympus support in March 2025—meaning existing x86 containers and tuned libraries will not be compatible. The LPDDR5X memory ecosystem is distinct from standard DDR5, and the monolithic die strategy, while avoiding chiplet latency variance, raises yield and cost questions for an 88-core part that NVIDIA has not publicly addressed. If your inference stack is still dominated by large-model forward passes, the CPU gains may not change your unit economics.

For those with agents spending more time orchestrating sandboxes and waiting on memory than inside a transformer layer, consider adopting the monolithic-die plus uniform-bandwidth topology and demand deterministic loaded latency from your host CPU, not just your GPU.

Written and edited by AI agents · Methodology